2009
Bergveld, H. J.; Nowak, K.; Karadi, R.; Iochem, S.; Ferreira, J.; Ledain, S.; Pieraerts, E.; Pommier, M.
A 65-nm-CMOS 100-MHz 87%-efficient DC-DC down converter based on dual-die system-in-package integration Proceedings
2009, ISBN: 9781424428939, (46).
@proceedings{2-s2.0-72449140593,
title = {A 65-nm-CMOS 100-MHz 87%-efficient DC-DC down converter based on dual-die system-in-package integration},
author = { H.J. Bergveld and K. Nowak and R. Karadi and S. Iochem and J. Ferreira and S. Ledain and E. Pieraerts and M. Pommier},
url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-72449140593&doi=10.1109%2fECCE.2009.5316334&partnerID=40&md5=62791ba9ff207e87242b38d3182b4f7a},
doi = {10.1109/ECCE.2009.5316334},
isbn = {9781424428939},
year = {2009},
date = {2009-01-01},
journal = {2009 IEEE Energy Conversion Congress and Exposition, ECCE 2009},
pages = {3698-3705},
abstract = {The increasing number of efficient voltage conversions realized in small volumes in many applications has introduced a trend towards small-form-factor DC-DC converters with integrated passives. Preferably, the DC-DC converter is integrated with the load, often in nm-CMOS, allowing for local supply optimization yielding increased power efficiency. However, energy-storage densities in nm-CMOS are low and silicon area is expensive. Therefore, to limit cost of monolithically integrated systems, passive components have low values, leading to very high switching frequencies, which compromises efficiency. This paper follows an alternative approach, where the active converter part is realized in 65-nm CMOS and the passive part in a low-cost high-density passive-integration process. With the active die flip-chipped on the passive die a small System-in-Package (SiP) is obtained with a peak efficiency of 87.5% at 100 MHz switching frequency and 85 mW output power. This performance is mainly caused by the high quality of the integrated passives. © 2009 IEEE.},
note = {46},
keywords = {},
pubstate = {published},
tppubtype = {proceedings}
}
The increasing number of efficient voltage conversions realized in small volumes in many applications has introduced a trend towards small-form-factor DC-DC converters with integrated passives. Preferably, the DC-DC converter is integrated with the load, often in nm-CMOS, allowing for local supply optimization yielding increased power efficiency. However, energy-storage densities in nm-CMOS are low and silicon area is expensive. Therefore, to limit cost of monolithically integrated systems, passive components have low values, leading to very high switching frequencies, which compromises efficiency. This paper follows an alternative approach, where the active converter part is realized in 65-nm CMOS and the passive part in a low-cost high-density passive-integration process. With the active die flip-chipped on the passive die a small System-in-Package (SiP) is obtained with a peak efficiency of 87.5% at 100 MHz switching frequency and 85 mW output power. This performance is mainly caused by the high quality of the integrated passives. © 2009 IEEE.
2008
Bergveld, H. J.; Karadi, R.; Nowak, K.
2008, ISSN: 02759306, (40).
@proceedings{2-s2.0-52349111938,
title = {An inductive down converter system-in-package for integrated power management in battery-powered applications},
author = { H.J. Bergveld and R. Karadi and K. Nowak},
url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-52349111938&doi=10.1109%2fPESC.2008.4592470&partnerID=40&md5=3c09d6a4bb09c1ca6b00b1f49526a2c0},
doi = {10.1109/PESC.2008.4592470},
issn = {02759306},
year = {2008},
date = {2008-01-01},
journal = {PESC Record - IEEE Annual Power Electronics Specialists Conference},
pages = {3335-3341},
abstract = {With the increasing number of voltage conversions that have to be efficiently implemented in a mobile device, the PCB space occupied by switched-mode DC-DC converters with external passive components will become unacceptably high. Therefore, a clear need exists for small-form-factor high-efficiency DC-DC converters having the necessary passive components integrated within one package. This will enable the integration of a DC-DC converter with the load and consequently the system integration of power management. This paper describes the measurement results of an integrated inductive down converter, where the active electronics (power stage and driver circuitry) has been implemented in 0.18-μm CMOS technology and the passive components (output LC filter and decoupling capacitor) have been implemented in a state-of-the-art proprietary passive-integration process technology using high-density trench-MOS capacitors (80 nF/mm2) and an 8-μm thick copper top metallization layer. The active die of the converter has been flip-chipped on top of the passive die to reduce parasitic component values. This yields a System-in-Package (SiP) that achieves a step-down DC-DC conversion without any external components. Due to the limited inductance achievable with the used planar air coil in the acceptable area, the switching frequency of the DC-DC converter has been increased. At the same time, Zero-Voltage-Switching (ZVS) measures have been implemented to reduce the switching losses at this increased frequency. A maximum efficiency of 65% at 80 MHz has been achieved for an input voltage of 1.8 V, an output voltage of 1.1 V and an output current of 100 mA. After explaining the motivation behind integrated power management and the choice for an integrated inductive converter, this paper describes the main design aspects of the realized integrated inductive DC-DC down converter. Next, it presents some details of the used passive-integration process, the design of the passive die including the LC filter and the construction of the SiP. Finally, the measurement results of the converter are discussed and conclusions are drawn. ©2008 IEEE.},
note = {40},
keywords = {},
pubstate = {published},
tppubtype = {proceedings}
}
With the increasing number of voltage conversions that have to be efficiently implemented in a mobile device, the PCB space occupied by switched-mode DC-DC converters with external passive components will become unacceptably high. Therefore, a clear need exists for small-form-factor high-efficiency DC-DC converters having the necessary passive components integrated within one package. This will enable the integration of a DC-DC converter with the load and consequently the system integration of power management. This paper describes the measurement results of an integrated inductive down converter, where the active electronics (power stage and driver circuitry) has been implemented in 0.18-μm CMOS technology and the passive components (output LC filter and decoupling capacitor) have been implemented in a state-of-the-art proprietary passive-integration process technology using high-density trench-MOS capacitors (80 nF/mm2) and an 8-μm thick copper top metallization layer. The active die of the converter has been flip-chipped on top of the passive die to reduce parasitic component values. This yields a System-in-Package (SiP) that achieves a step-down DC-DC conversion without any external components. Due to the limited inductance achievable with the used planar air coil in the acceptable area, the switching frequency of the DC-DC converter has been increased. At the same time, Zero-Voltage-Switching (ZVS) measures have been implemented to reduce the switching losses at this increased frequency. A maximum efficiency of 65% at 80 MHz has been achieved for an input voltage of 1.8 V, an output voltage of 1.1 V and an output current of 100 mA. After explaining the motivation behind integrated power management and the choice for an integrated inductive converter, this paper describes the main design aspects of the realized integrated inductive DC-DC down converter. Next, it presents some details of the used passive-integration process, the design of the passive die including the LC filter and the construction of the SiP. Finally, the measurement results of the converter are discussed and conclusions are drawn. ©2008 IEEE.